The architecture of the Univac Solid State Computer 90.


There was not...

First of all I have to mention all there was not: In the CPU there was no stack, there were no interrupts or interrupt-calls, there was not any form of an operating system, there was no user interface - only 49 lamps displaying the contents of a register, so no console, not a keyboard but only a small keypad to enter numerical digits only, no resident software like Bios or ROM, no autonomous start-up, no energy-saving system, no back-up device, sorry, not even anything to be back-upped. The fastest way for data-transmission in the days of this Univac Computer was to call for a cab and to ask the driver to deliver the print-outs, a tape or a box with punch-cards at a certain address. But back then in 1971, we did not know what we were missing and we felt rich owning this superb computer.

The architecture.

The computer was designed around the memory-drum. The drum was built according to the highest technical standards and possibilities then available. This made that the highest frequency that could reliably be recorded on the drum and which would allow to be modulated to contain data, turned out to be around 700 kHz. The number of bands and the size of the data-packages (words) were chosen on physical and computer-technical grounds. In those days each bit required about one square millimeter of space on the magnetic surface of the drum. The data-density in a modern Hard disk of 1 TB is about ten million (10e7) times better. So there was a drum with 25 bands of each 200 words which each contained ten digits, a sign and a gap. The drum rotated with 295 c/S wich caused the average access-time to be 1/2 x 3.4 mS. Five of these bands were designed for a higher speed access by writing and reading them with four sets of heads, each set on a 90' place. This diminished the access time to a fourth and this area was called high-speed-access. To provide a timing-system to synchronize the drum and the computer, a sprocket and a timing-band were written on the drum in the factory. Further buffer-bands were added, first to make the IO-devices to work autonomously from or to these buffers and secondly to keep the logics of these interfaces simple. Around this magnetic-drum the computer was designed.


The alpha/numeric code for punch-cards had already been established since Remington Rand had been building card equipment using the 90-column Remington Rand card code for several decades. For the internal machine-code the 4 bit biquinary code was chosen. The first three bits were binary but the fourth bit got the value of 5. This made the code 5-symmetrical, which simplified the logics for accessing the high speed area of the drum-memory. Within this biquinary code only one bit (4000) in the address correlated with addressing the fast-access-bands or the high-speed access-bands. In accessing the high-speed-area two bits were directly related to the segment (100 and 50). And five bits directly addressed the bands (200 + 400 + 500 + 1000 + 2000). The 4000-bit directly pointed to the high-speed-access area, the bands 4000, 4200, 4400, 4600 and 4800. Because the 5000 bit had no significance for the drum, it was used to force the CPU and the drum to simulate high-speed-access on the normal-access-bands. We never found any reason to use this feature. To ensure data-integrity of the data-transfers to and from the drum, a 5th bit was added to the code, the parity-bit, which made that all digits consisted of an odd number of 1-bits. When parity failed, the computer would stop immediately. In our system I never saw this happening. An odd thing was that the USSC80 used a totally different set of A/N-codes than the USSC90 did.


The engineers had a memory-drum from which the data was read with a speed of 707.000 bits per second. For the 4 registers, the arithmetic, the logics and the IO-control relays were far too slow, tubes were too big, too hot and not reliable enough and transistors were still in an experimental stage. Transistors were only used for amplifying small signals and for the interfaces between the ferractor circuits and relays. Any kinds of integrated circuits were unknown then. The ferractor turned out to be the most reliable logical device. After research (described in part 6 of the Solid State 90 service manual 1) the engineers found that small transformers pushed into saturation with an AC of 707kHz, could be used as amplifiers. These transformers had a bias-coil and a small bias-current could cause the core to be magnetized or not. On the next half cycle the core showed a high or low impedance, depending on its magnetic state. The bias-current was relatively small and this made that one amplifier-circuit could drive 5 to 7 other circuits. These amplifiers stored the bit for half a cycle. This meant that there was no need for flip-flops for building registers. By putting 24 ferractor-circuits in a chain, they built a register in which 12 bits circled around. Four of these chains could store a four bit ten digit word and these were used as registers.

Logic drawing of register A, the triangles represented ferractors, those with a black dot were inverting ferractors and the black dots in the matrix and the half rounds were OR-ports or diodes.

The ferractors were powered by a 36 Volts top-to-top AC of 707 kHz. They could only be connected for data-transmission to each other when they were powered by ACs that differed in phase 180 degrees (or opposite polarity). This made that the reading of one ferractor delivered a signal for writing the following one. In registers no parity-bit was used. The operators had to run diagnostic programs several times a day to ensure the integrity of the computer. In practice small errors in logic were noticed quite fast, since the operators knew the rhythm of program-execution and would notice any aberration. I experimented with converting register-data into an audio-signal to enhance the recognition of program- or hardware failures by listening to the program-executions. The ferractor-logic created a computer in which the bits were valued first by their timing and secondly by their location. Timing was one of the basic issues in the design and the maintenance of this computer. For the logics the USSC only contained diode ports, performing OR-functions. By using inverting ferractor-circuits behind each other, one obtained alternating positive logic and negative logic (negative logic transduces OR's into NAND's). So the OR-functions were situated in the positive logic parts and the AND-ports were located in the inverted-logic parts. The delay that each ferractor caused could also be a problem. One had to design all logic as simple as possible not to lose time in control, logics or calculations. This because the drum-spinning would go on.
Diode-matrix for instruction-decoding, the black dots represent the diodes All seven registers, the Accumulator (rA), the X-one (rX), the Logic register (rL), the Control register (rC) and the three Index registers contained circling numbers that always remained synchronous with the data on the revolving drum. This could never fail. That's why the Instruction-code part of the program-instruction was copied from rC into the Static Register (SR) consisting of nine one-bit ferractor flip-flops (2 digits and a sign). The purpose of this SR was to control logics and arithmetic-units during the execution of an instruction. For this function steady (static) signals were necessary.


There were several timing-systems.

All bits were interpreted according to the time-slot in which they occurred. To enhance this, several timing-instruments were built into the CPU. 1- First there was the sprocket-signal read from the rotating drum, this was a sinus of 707kHz and this gave the basic-timing for all circuits. It was amplified in phase. Otherwise data on the drum, like the timing-band, could not be read. Amplified to 36Vtt by a 1 kW transmitter-amplifier this AC powered the ferractor-circuits. 2- Secondly there was the timing-band providing the machine with 200 words with bit-paterns. + Each word contained a sentinel on place 6. This sentinel induced the bit that entered the one-bit cycling-unit for timing the CPU. + The timing-band contained all the addresses to identify the data-words on the drum. + Also this band contained signals that directed the copying of the interlace patterns to or from the buffers. + Moreover, it contained signals that controlled the data-buffer-transfers to or from the capacitor-bank and other devices in the IO-equipment. 3- Thirdly there was a one-bit timing-register: the cycling unit. It existed of 24 ferractors in which one bit was circling around and was tapped in 24 places in positive- or negative-logics to provide in-word-timing-signals to control the execution of instructions. These timing-signals were used throughout the CPU.
The single-bit cycling-unit, the top/left shows the port that recognized the sentinel of the timing-band. 4- The card-reader contained a timing-disc to relate the place of the moving punch-cards with the bit-values of the punched holes, This signal was counted and as a number used to value the holes of the punch-card read, and to send these bits to the according bit-track of the buffer. 5- The read-punch only needed a simple timing switch since the reading was done with blocks of 540 switches and the punching was performed by making 540 punches in one movement. These punches were actuated separately by 540 electro-magnets. This made that for the read-punch nearly 100 mS was available for buffer-transfers. Presumably the choice to read the cards with these switch-blocks was made for better reliability. Otherwise, they would have had to build in two reading-stations before the punching and two more for the check afterwards. Also the blocks had the advantage that the reading and the setting of these blocks could be done directly from or to the buffer controlled by timing-band-signals; in this system there was no need for capacitor banks.

The operator.

CPU-control, the human interface.

There was no console. To enforce a console like we are used to nowadays, they had to build an interface 56 times bigger than the CPU, with at least 40 memory-drums. It would have been useless since there was no data available in those days that could be displayed on such a console. The operators-console consisted of 40 lamps showing a register-content. Directly underneath there were switches to select the register to be displayed. Left of the register-lamps there were two (!) lamps to display the sign and further left there were 8 lamps displaying the static registers content, the instruction-code executed. An operator had to rely on binary information only when working with the USSC and of course he or she knew all numeric codes and instruction codes by heart. There was no way to examine the numbers of the memory-words directly. When debugging, a programmer had to manually type in register-transfer-instructions to read the contents of certain memory-words and to see them appearing in a register. To allow for the debugging of programs, there were eight switches for setting the operating-mode. They were situated below the lamps and they controlled the CPU. One switch was always 'in'. Of the first four switches, one pressed would allow progress of a program till an instruction of an IO-device was going to be executed. The next switch allowed progress till the execution of a comparison was going to happen. The sixth and the seventh caused the execution of one instruction at a time, with or without indexing and the eighth one allowed the CPU to run a program in continuous mode. Meanwhile one could influence step-by-step program-execution by pressing the M or C switch, by which one could force the CPU to continue with the address in the M or the C part of the instruction. When a halt on comparison was chosen, the debugger could change the outcome of this comparison by pressing M or C. Some programs would halt with a stop-instruction, giving the operator a choice. He could then express his choice by pressing M or C before he pressed RUN for continuation of the program. On the left there were three switches to bypass IO-operations. When pressed all actions were normally performed, only the mechanical part like moving the card or the printing, was passed by. Whether for a single instruction or for running a program, the CPU was started by pressing the RUN-button. In a program it could be stopped by pressing STOP. When this was done during a card-processing program, it was rather complicated, if not impossible, to restart the program. The operator had to stop program-execution when an erroneous condition occurred in the IO like torn paper for the printer or a card-failure in the card reader while the computer had not noticed this. To enter a number in a selected register we had to use a simple numerical pad with 13 keys. One always had to start entering a number by pressing the A-button. Then a ten-digit number could be entered and this was terminated with a sign. The eight bit-combinations that were not represented by numbers, were entered by pressing two numeric keys at once. There was no hardware-check for the length of the number.
The logic of the keypad Further, there were six off-normal-lights informing the operator that the CPU was halted by an erroneous condition of an IO-device.

The IO-buffers.

The IO-buffers were designed to keep the IO-logics as simple as possible. In the card-reader the cards were read by steel brushes, they contacted the brass cylinder under the punch-cards when a punched hole was underneath. Because these signals contained lots of noise, the bit-values first were used to load capacitors in a bank. Then, within the time the card was moving to the next row (8.3 mS), the data in this bank was copied into one bit-track of the card buffer. The reset of the capacitor-bank between each row of the punch-card was controlled by the timing-disc on the reader; the transfer to the buffer was controlled by signals from the timing-band. Each card was read twice to allow for a check. The steel brushes could easily pick up paper-fragments which would prevent them from making contact with the brass-cylinder. So it was necessary to read them twice and to perform a programmed-check on equality. Printing: Physically the printer was built as follows. A central part was the print-cylinder, containing 65 wheels with each two sets of 51 characters in relief. One set was vertically shifted one place from the other, to achieve that each relief-character on the cylinder was surrounded by four empty places. This prohibited smudging on the paper during the printing process. This cylinder turned around 10 C/S. Directly behind this wheel the ink-ribbon was situated, then the chain-form was held and behind these there were the 130 print-hammers. These could be fired by electro-magnetic-actuators which, when fired at the right moment, would press paper, ribbon and the character against eachother, leaving an imprint on the paper. Note that this had to be performed while the print-cylinder was moving around. Each hammer had to be fired in a time-slot of approximately 0.1 mS to ensure that all characters printed in a line were positioned neatly. First the data to be printed had to be placed into the interlace-pattern of a memory-band by a program. With the print-instruction 11 this data was first copied four times into the buffer, so it could be read as a high-speed-band. Then for each character passing by on the print-cylinder (0.9 mS), the complete line-data of the buffer was compared with the code read from the print-cylinder-drum. This was a small magnetic drum containing the code of all corresponding characters on the printing wheels. Then the buffer-contence was read and for each position (hammer), it was compared with the signal of the print-cylinder-drum. On matches (if the character to print was found) a flipflop was set. Timed collectively these would cause ignition of the according thyratron (a gas filled triode) that would enforce the print-hammer-actuator behind that print-wheel. There were 130 hammers. This hammer would then hit the paper, the ink-ribbon and the character in relief on the printing-cylinder, leaving the character-image on the paper. For each line to be printed the complete data from the buffer was compared 51 times with the character-code from the magnetic-print-drum. This speed and this redundancy provided by the print-buffer, that was written in four-fold, made that only simple hardware was needed. ---                   
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